Channel Paradigm: Comprehensive Overview with GPU Interface

This page provides a detailed exploration of the Channel Paradigm, developed by Tony Swain (@tswain555), focusing on its GPU operations via the Abstract Blitter Command Interface, alongside other key areas. The paradigm leverages 16 core channels, each supporting up to 16 sub-channels, implemented as non-blocking, reentrant, full-duplex pipes in a 64-bit SDL3 environment. Data is presented in centered tables with white backgrounds for clarity.

1. ChannelData Bytecodes

The ChannelData bytecodes define memory allocations for the 16 core channels and their sub-channels, encapsulated in the MemoryAllocationRequest struct. These bytecodes specify resource types, data formats, dimensions, and modifiers, enabling precise allocation for tasks like rendering, I/O, and media handling.

1.1. MemoryAllocationRequest Struct

Field Type Description
ma_size uint64_t Size of allocation
ma_name void * Name or identifier
ma_ram_type uint8_t Memory domain (e.g., GPU_MEMORY)
ma_data_type uint8_t Data type (e.g., DATA_OBJECT)
ma_dimension_type uint8_t Dimensionality (e.g., DATA_2D_ARRAY)
ma_flags uint8_t Modifiers (e.g., DATA_SIGNED)
ma_pad char[24] 64-bit alignment padding

1.2. Bytecode Definitions

Field Values
ma_ram_type HEAP_MEMORY (0): CPU heap
STACK_MEMORY (1): Stack memory
IPC_MEMORY (2): Inter-process communication
GPU_MEMORY (3): GPU buffers/textures
CLOUD_MEMORY (4): Remote data
REGISTRY_MEMORY (5): Metadata storage
PAGE_MEMORY (6): Virtual pages
ma_data_type DATA_BYTE (0): 8-bit integer
DATA_SHORT (1): 16-bit integer
DATA_CHAR (2): 8-bit character
DATA_INT (3): 32-bit integer
DATA_LONG (4): 64-bit integer
DATA_FLOAT (5): 32-bit float
DATA_DOUBLE (6): 64-bit double
DATA_OBJECT (7): Composite struct
ma_dimension_type DATA_PRIMITIVE (0): Scalar value
DATA_ARRAY (1): 1D array
DATA_2D_ARRAY (2): 2D array/texture
DATA_3D_ARRAY (3): 3D array
ma_flags DATA_SIGNED (0x40): Signed integers (not for objects)
DATA_CONTAINED (0x40): Self-contained objects
DATA_PACK_PARAMETERS (0x80): Packed parameters

These bytecodes enable channels like MemoryChannel to allocate resources efficiently, supporting GPU tasks (GPU_MEMORY) and other operations.

2. Channel/Subchannel Structure

The Channel Paradigm organizes tasks into 16 core channels, each capable of supporting up to 16 sub-channels, creating a potential grid of 256 channels. Channels are non-blocking, reentrant, full-duplex pipes, ensuring seamless communication and task execution.

2.1. Core Channels and Sub-Channels

Core Channel Description Sub-Channels
NetXecChannel Event monitoring/control processes and thread throttling STDINChannel
STDOUTChannel
STDERRChannel
DeviceChannel System control for hardware interactions GPUChannel
USBChannel
MemoryChannel Manages memory allocation HeapChannel
StackChannel
SharedMemoryChannel
GPUChannel
CloudChannel
BackingStoreChannel
DeviceMemoryChannel
PageMemoryChannel
ThreadChannel Manages concurrent tasks ArbitrationChannel
SignalChannel Coordinates events (None specified)
MediaChannel Handles multimedia processing AudioChannel
ImageChannel
VideoChannel
VLCChannel
ClockChannel Tracks timing TimerChannel
ContainerChannel Manages UI components ScreenChannel
XChannel
URLChannel Fetches remote data FTPChannel
TelnetChannel
GopherChannel
FileChannel
ChatChannel
IRCChannel
ServerChannel Hosts services PortServerChannel
FTPSServerChannel
HTTPServerChannel
SQLServerChannel
BMLServerChannel
BQLServerChannel
BlockServerChannel
Process0Channel Executes computational tasks EncryptionChannel
StatisticsChannel
TransformChannel
SMCChannel
JSRuntime0Channel
CrunTimeChannel
FortranRuntimeChannel
ColorChannel
AntlrChannel
BitcoinChannel
WalletChannel
PietRuntimeChannel
Process1Channel Manages connectivity and data processing GPSChannel
GPRSChannel
BMLChannel
BQLChannel
HTMLChannel
SQLChannel
EMScriptenChannel
SolidChannel
XMLChannel
StateMachineChannel
CliChannel Provides command-line access (None specified)
CompilerChannel Compiles code for various platforms X64AssemblerChannel
ARMAssemblerChannel
Cchannel
FortranChannel
EstriptenChannel
JavaScriptChannel
JuliaChannel
DebugChannel Monitors system state GDBChannel
NimosiniChannel Supports AI tasks and channel code generation NeuralChannel0
NeuralChannel1
NeuralChannel2
NeuralChannel3
NeuralChannel4
NeuralChannel5
NeuralChannel6
NeuralChannel7
NeuralChannel8
NeuralChannel9
NeuralChannel10
NeuralChannel11
NeuralChannel12
NeuralChannel13
NeuralChannel14
NeuralChannel15

2.2. Channel Struct

Field Type Description
ch_parent struct Channel * Parent channel reference
ch_flags uint64_t Channel state flags
ch_index uint64_t Channel identifier
ch_state struct StateMachine * State machine for task management
ch_name char[256] Channel name (e.g., "System")
ch_read, ch_write char * User read/write buffers
ch_system_read, ch_system_write char * System read/write buffers
ch_user_read, ch_user_write char * Additional user buffers
ch_graphics struct GraphicsContext Rendering context
ch_runtime struct Runtime * Lifecycle functions
ch_thread struct NetXecThread * Associated thread
DoIO void (*)(struct Channel*, struct IORequest*) Asynchronous I/O function
SendIO void (*)(struct Channel*, struct IORequest*) I/O send function

The structure creates a hierarchical system, with core channels like MediaChannel delegating tasks to sub-channels for parallel execution.

3. Dynamic Bit Stream Commands

The Dynamic Bit Stream Commands encode operations for core channels and sub-channels in a 64-bit stream, stored in a MemoryHandle. These commands use variable-bit opcodes to manage tasks like GPU blitting, I/O, and event handling.

3.1. Command Format

Component Description
NOP Marker 32-bit 0x00000000 signals command mode
Bit-Size Byte 8-bit value (4, 5, 6, 7, or 8) sets opcode size
Opcode 4–8-bit field encoding the command
Parameters Inline data (e.g., color) or offsets (e.g., BlitPacket)

The bit stream’s variable-bit opcodes minimize memory usage, supporting efficient task execution across channels.

4. GPU Interface: Abstract Blitter Command Interface

The Abstract Blitter Command Interface manages GPU operations within the Channel Paradigm, executed by channels like GPUChannel (a sub-channel of DeviceChannel and MemoryChannel). It defines a comprehensive set of GPU commands, encoded in the bit stream, for rendering, image processing, and transformations.

4.1. GPU Command Set

Command Set Range Commands
4-Bit 0x00–0x0F GPU_NOP (0x00): No operation
GPU_COPY (0x01): Copies pixel data
GPU_FILL (0x02): Fills a region
GPU_BLIT (0x03): Transfers pixels
GPU_CLEAR (0x04): Clears buffer
GPU_SETAPEN (0x05): Sets foreground color
GPU_SETBPEN (0x06): Sets background color
GPU_DRAW_LINE (0x07): Draws a line
GPU_DRAW_RECTANGLE (0x08): Draws a rectangle
GPU_DRAW_ELIPSE (0x09): Draws an ellipse
GPU_DRAW_IMAGE (0x0A): Renders an image
GPU_DRAW_POLYGON (0x0B): Draws a polygon
GPU_SPLINE (0x0C): Renders a spline
GPU_CHANNEL_ALLOCATE (0x0D): Allocates GPU memory
GPU_CHANNEL_FREE (0x0E): Frees GPU memory
GPU_CUSTOM0 (0x0F): Custom operation
5-Bit 0x10–0x1F GPU_ALPHA_BLIT (0x10): Blits with alpha
GPU_ALPHABLEND (0x11): Blends with alpha
GPU_ALPHA_FILL (0x12): Fills with alpha
GPU_COLORKEY (0x13): Applies color key
GPU_COLOR_CORRECT (0x14): Corrects color
GPU_BRIGHTNESS (0x15): Adjusts brightness
GPU_CONTRAST (0x16): Adjusts contrast
GPU_SATURATION (0x17): Changes saturation
GPU_HUE_ROTATE (0x18): Rotates hue
GPU_COLOR_FILTER (0x19): Applies color filter
GPU_INVERT_COLORS (0x1A): Inverts colors
GPU_GRAYSCALE (0x1B): Converts to grayscale
GPU_TILEMAP_COPY (0x1C): Copies tilemap
GPU_TILEMAP_FILL (0x1D): Fills tilemap
GPU_MASK (0x1E): Applies mask
GPU_EDGE_DETECT (0x1F): Detects edges
6-Bit 0x20–0x3F GPU_MOTION_BLUR (0x20): Applies motion blur
GPU_WARP (0x21): Warps image
GPU_NOISE (0x22): Adds noise
GPU_SCRATCH (0x23): Simulates scratch
GPU_SHADOW (0x24): Adds shadow
GPU_OUTLINE (0x25): Draws outline
GPU_MULTIPLY (0x26): Multiplies colors
GPU_SCREEN (0x27): Screen blending
GPU_ADDITIVE (0x28): Additive blending
GPU_SUBTRACTIVE (0x29): Subtractive blending
GPU_DIFFERENCE (0x2A): Color difference
GPU_LIGHTEN (0x2B): Lightens image
GPU_DARKEN (0x2C): Darkens image
GPU_SOFTEN (0x2D): Softens image
GPU_SHARPEN (0x2E): Sharpens image
GPU_EMBOSS (0x2F): Emboss effect
GPU_PIXELATE (0x30): Pixelates image
GPU_DITHER (0x31): Applies dithering
GPU_HIGHLIGHT (0x32): Highlights region
GPU_SHADOWIZE (0x33): Enhances shadows
GPU_OPAQUE (0x34): Sets opaque
GPU_TRANSLUCENT (0x35): Sets translucent
GPU_GLOW (0x36): Adds glow
GPU_FADE_IN (0x37): Fades in
GPU_FADE_OUT (0x38): Fades out
GPU_BLUR (0x39): Applies blur
GPU_CONTOUR (0x3A): Draws contours
GPU_INTERRUPT (0x3B): Interrupts processing
GPU_ZOOM_IN (0x3C): Zooms in
GPU_ZOOM_OUT (0x3D): Zooms out
GPU_BEZIER_PLOT (0x3E): Plots Bezier curve
GPU_BEZIER_UPDATE (0x3F): Updates Bezier curve
7-Bit 0x40–0x6C GPU_USER_FUNCTION0 (0x40) to GPU_USER_FUNCTION35 (0x63): Custom functions
GPU_SCALE_UP (0x64): Scales up
GPU_SCALE_DOWN (0x65): Scales down
GPU_ROTATE_LEFT (0x66): Rotates left
GPU_ROTATE_RIGHT (0x67): Rotates right
GPU_ROTATE_180 (0x68): Rotates 180°
GPU_FLIP_HORIZ (0x69): Flips horizontally
GPU_FLIP_VERT (0x6A): Flips vertically
GPU_MIRROR_HORIZ (0x6B): Mirrors horizontally
GPU_MIRROR_VERT (0x6C): Mirrors vertically

4.2. Role in the Channel Paradigm

GPU commands are executed by GPUChannel, integrated with GraphicsContext for rendering. MemoryChannel allocates GPU_MEMORY for these operations, ensuring concurrency with HyperLock. The commands support tasks like UI rendering in ContainerChannel and image processing in MediaChannel.

4.3. SPIR-V Definitions for GPU Commands

Command Set SPIR-V Definitions
4-Bit %SPIRVGPU_NOP = OpConstant %uint32_t 0x00 ; No operation, concurrent
%SPIRVGPU_COPY = OpConstant %uint32_t 0x01 ; Copies pixels, parallel
%SPIRVGPU_FILL = OpConstant %uint32_t 0x02 ; Fills region, non-blocking
%SPIRVGPU_BLIT = OpConstant %uint32_t 0x03 ; Transfers pixels, thread-safe
%SPIRVGPU_CLEAR = OpConstant %uint32_t 0x04 ; Clears buffer, concurrent
%SPIRVGPU_SETAPEN = OpConstant %uint32_t 0x05 ; Sets foreground, parallel
%SPIRVGPU_SETBPEN = OpConstant %uint32_t 0x06 ; Sets background, non-blocking
%SPIRVGPU_DRAW_LINE = OpConstant %uint32_t 0x07 ; Draws line, thread-safe
%SPIRVGPU_DRAW_RECTANGLE = OpConstant %uint32_t 0x08 ; Draws rectangle, concurrent
%SPIRVGPU_DRAW_ELIPSE = OpConstant %uint32_t 0x09 ; Draws ellipse, parallel
%SPIRVGPU_DRAW_IMAGE = OpConstant %uint32_t 0x0A ; Renders image, non-blocking
%SPIRVGPU_DRAW_POLYGON = OpConstant %uint32_t 0x0B ; Draws polygon, thread-safe
%SPIRVGPU_SPLINE = OpConstant %uint32_t 0x0C ; Renders spline, concurrent
%SPIRVGPU_CHANNEL_ALLOCATE = OpConstant %uint32_t 0x0D ; Allocates memory, parallel
%SPIRVGPU_CHANNEL_FREE = OpConstant %uint32_t 0x0E ; Frees memory, non-blocking
%SPIRVGPU_CUSTOM0 = OpConstant %uint32_t 0x0F ; Custom operation, thread-safe
5-Bit %SPIRVGPU_ALPHA_BLIT = OpConstant %uint32_t 0x10 ; Blits with alpha, concurrent
%SPIRVGPU_ALPHABLEND = OpConstant %uint32_t 0x11 ; Blends with alpha, parallel
%SPIRVGPU_ALPHA_FILL = OpConstant %uint32_t 0x12 ; Fills with alpha, non-blocking
%SPIRVGPU_COLORKEY = OpConstant %uint32_t 0x13 ; Applies color key, thread-safe
%SPIRVGPU_COLOR_CORRECT = OpConstant %uint32_t 0x14 ; Corrects color, concurrent
%SPIRVGPU_BRIGHTNESS = OpConstant %uint32_t 0x15 ; Adjusts brightness, parallel
%SPIRVGPU_CONTRAST = OpConstant %uint32_t 0x16 ; Adjusts contrast, non-blocking
%SPIRVGPU_SATURATION = OpConstant %uint32_t 0x17 ; Changes saturation, thread-safe
%SPIRVGPU_HUE_ROTATE = OpConstant %uint32_t 0x18 ; Rotates hue, concurrent
%SPIRVGPU_COLOR_FILTER = OpConstant %uint32_t 0x19 ; Applies filter, parallel
%SPIRVGPU_INVERT_COLORS = OpConstant %uint32_t 0x1A ; Inverts colors, non-blocking
%SPIRVGPU_GRAYSCALE = OpConstant %uint32_t 0x1B ; Converts to grayscale, thread-safe
%SPIRVGPU_TILEMAP_COPY = OpConstant %uint32_t 0x1C ; Copies tilemap, concurrent
%SPIRVGPU_TILEMAP_FILL = OpConstant %uint32_t 0x1D ; Fills tilemap, parallel
%SPIRVGPU_MASK = OpConstant %uint32_t 0x1E ; Applies mask, non-blocking
%SPIRVGPU_EDGE_DETECT = OpConstant %uint32_t 0x1F ; Detects edges, thread-safe
6-Bit %SPIRVGPU_MOTION_BLUR = OpConstant %uint32_t 0x20 ; Applies motion blur, concurrent
%SPIRVGPU_WARP = OpConstant %uint32_t 0x21 ; Warps image, parallel
%SPIRVGPU_NOISE = OpConstant %uint32_t 0x22 ; Adds noise, non-blocking
%SPIRVGPU_SCRATCH = OpConstant %uint32_t 0x23 ; Simulates scratch, thread-safe
%SPIRVGPU_SHADOW = OpConstant %uint32_t 0x24 ; Adds shadow, concurrent
%SPIRVGPU_OUTLINE = OpConstant %uint32_t 0x25 ; Draws outline, parallel
%SPIRVGPU_MULTIPLY = OpConstant %uint32_t 0x26 ; Multiplies colors, non-blocking
%SPIRVGPU_SCREEN = OpConstant %uint32_t 0x27 ; Screen blending, thread-safe
%SPIRVGPU_ADDITIVE = OpConstant %uint32_t 0x28 ; Additive blending, concurrent
%SPIRVGPU_SUBTRACTIVE = OpConstant %uint32_t 0x29 ; Subtractive blending, parallel
%SPIRVGPU_DIFFERENCE = OpConstant %uint32_t 0x2A ; Color difference, non-blocking
%SPIRVGPU_LIGHTEN = OpConstant %uint32_t 0x2B ; Lightens image, thread-safe
%SPIRVGPU_DARKEN = OpConstant %uint32_t 0x2C ; Darkens image, concurrent
%SPIRVGPU_SOFTEN = OpConstant %uint32_t 0x2D ; Softens image, parallel
%SPIRVGPU_SHARPEN = OpConstant %uint32_t 0x2E ; Sharpens image, non-blocking
%SPIRVGPU_EMBOSS = OpConstant %uint32_t 0x2F ; Emboss effect, thread-safe
%SPIRVGPU_PIXELATE = OpConstant %uint32_t 0x30 ; Pixelates image, concurrent
%SPIRVGPU_DITHER = OpConstant %uint32_t 0x31 ; Applies dithering, parallel
%SPIRVGPU_HIGHLIGHT = OpConstant %uint32_t 0x32 ; Highlights region, non-blocking
%SPIRVGPU_SHADOWIZE = OpConstant %uint32_t 0x33 ; Enhances shadows, thread-safe
%SPIRVGPU_OPAQUE = OpConstant %uint32_t 0x34 ; Sets opaque, concurrent
%SPIRVGPU_TRANSLUCENT = OpConstant %uint32_t 0x35 ; Sets translucent, parallel
%SPIRVGPU_GLOW = OpConstant %uint32_t 0x36 ; Adds glow, non-blocking
%SPIRVGPU_FADE_IN = OpConstant %uint32_t 0x37 ; Fades in, thread-safe
%SPIRVGPU_FADE_OUT = OpConstant %uint32_t 0x38 ; Fades out, concurrent
%SPIRVGPU_BLUR = OpConstant %uint32_t 0x39 ; Applies blur, parallel
%SPIRVGPU_CONTOUR = OpConstant %uint32_t 0x3A ; Draws contours, non-blocking
%SPIRVGPU_INTERRUPT = OpConstant %uint32_t 0x3B ; Interrupts processing, thread-safe
%SPIRVGPU_ZOOM_IN = OpConstant %uint32_t 0x3C ; Zooms in, concurrent
%SPIRVGPU_ZOOM_OUT = OpConstant %uint32_t 0x3D ; Zooms out, parallel
%SPIRVGPU_BEZIER_PLOT = OpConstant %uint32_t 0x3E ; Plots Bezier curve, non-blocking
%SPIRVGPU_BEZIER_UPDATE = OpConstant %uint32_t 0x3F ; Updates Bezier curve, thread-safe
7-Bit %SPIRVGPU_USER_FUNCTION0 = OpConstant %uint32_t 0x40 ; Custom function, concurrent
%SPIRVGPU_USER_FUNCTION1 = OpConstant %uint32_t 0x41 ; Custom function, parallel
%SPIRVGPU_USER_FUNCTION2 = OpConstant %uint32_t 0x42 ; Custom function, non-blocking
%SPIRVGPU_USER_FUNCTION3 = OpConstant %uint32_t 0x43 ; Custom function, thread-safe
%SPIRVGPU_USER_FUNCTION4 = OpConstant %uint32_t 0x44 ; Custom function, concurrent
%SPIRVGPU_USER_FUNCTION5 = OpConstant %uint32_t 0x45 ; Custom function, parallel
%SPIRVGPU_USER_FUNCTION6 = OpConstant %uint32_t 0x46 ; Custom function, non-blocking
%SPIRVGPU_USER_FUNCTION7 = OpConstant %uint32_t 0x47 ; Custom function, thread-safe
%SPIRVGPU_USER_FUNCTION8 = OpConstant %uint32_t 0x48 ; Custom function, concurrent
%SPIRVGPU_USER_FUNCTION9 = OpConstant %uint32_t 0x49 ; Custom function, parallel
%SPIRVGPU_USER_FUNCTION10 = OpConstant %uint32_t 0x4A ; Custom function, non-blocking
%SPIRVGPU_USER_FUNCTION11 = OpConstant %uint32_t 0x4B ; Custom function, thread-safe
%SPIRVGPU_USER_FUNCTION12 = OpConstant %uint32_t 0x4C ; Custom function, concurrent
%SPIRVGPU_USER_FUNCTION13 = OpConstant %uint32_t 0x4D ; Custom function, parallel
%SPIRVGPU_USER_FUNCTION14 = OpConstant %uint32_t 0x4E ; Custom function, non-blocking
%SPIRVGPU_USER_FUNCTION15 = OpConstant %uint32_t 0x4F ; Custom function, thread-safe
%SPIRVGPU_USER_FUNCTION16 = OpConstant %uint32_t 0x50 ; Custom function, concurrent
%SPIRVGPU_USER_FUNCTION17 = OpConstant %uint32_t 0x51 ; Custom function, parallel
%SPIRVGPU_USER_FUNCTION18 = OpConstant %uint32_t 0x52 ; Custom function, non-blocking
%SPIRVGPU_USER_FUNCTION19 = OpConstant %uint32_t 0x53 ; Custom function, thread-safe
%SPIRVGPU_USER_FUNCTION20 = OpConstant %uint32_t 0x54 ; Custom function, concurrent
%SPIRVGPU_USER_FUNCTION21 = OpConstant %uint32_t 0x55 ; Custom function, parallel
%SPIRVGPU_USER_FUNCTION22 = OpConstant %uint32_t 0x56 ; Custom function, non-blocking
%SPIRVGPU_USER_FUNCTION23 = OpConstant %uint32_t 0x57 ; Custom function, thread-safe
%SPIRVGPU_USER_FUNCTION24 = OpConstant %uint32_t 0x58 ; Custom function, concurrent
%SPIRVGPU_USER_FUNCTION25 = OpConstant %uint32_t 0x59 ; Custom function, parallel
%SPIRVGPU_USER_FUNCTION26 = OpConstant %uint32_t 0x5A ; Custom function, non-blocking
%SPIRVGPU_USER_FUNCTION27 = OpConstant %uint32_t 0x5B ; Custom function, thread-safe
%SPIRVGPU_USER_FUNCTION28 = OpConstant %uint32_t 0x5C ; Custom function, concurrent
%SPIRVGPU_USER_FUNCTION29 = OpConstant %uint32_t 0x5D ; Custom function, parallel
%SPIRVGPU_USER_FUNCTION30 = OpConstant %uint32_t 0x5E ; Custom function, non-blocking
%SPIRVGPU_USER_FUNCTION31 = OpConstant %uint32_t 0x5F ; Custom function, thread-safe
%SPIRVGPU_USER_FUNCTION32 = OpConstant %uint32_t 0x60 ; Custom function, concurrent
%SPIRVGPU_USER_FUNCTION33 = OpConstant %uint32_t 0x61 ; Custom function, parallel
%SPIRVGPU_USER_FUNCTION34 = OpConstant %uint32_t 0x62 ; Custom function, non-blocking
%SPIRVGPU_USER_FUNCTION35 = OpConstant %uint32_t 0x63 ; Custom function, thread-safe
%SPIRVGPU_SCALE_UP = OpConstant %uint32_t 0x64 ; Scales up, concurrent
%SPIRVGPU_SCALE_DOWN = OpConstant %uint32_t 0x65 ; Scales down, parallel
%SPIRVGPU_ROTATE_LEFT = OpConstant %uint32_t 0x66 ; Rotates left, non-blocking
%SPIRVGPU_ROTATE_RIGHT = OpConstant %uint32_t 0x67 ; Rotates right, thread-safe
%SPIRVGPU_ROTATE_180 = OpConstant %uint32_t 0x68 ; Rotates 180°, concurrent
%SPIRVGPU_FLIP_HORIZ = OpConstant %uint32_t 0x69 ; Flips horizontally, parallel
%SPIRVGPU_FLIP_VERT = OpConstant %uint32_t 0x6A ; Flips vertically, non-blocking
%SPIRVGPU_MIRROR_HORIZ = OpConstant %uint32_t 0x6B ; Mirrors horizontally, thread-safe
%SPIRVGPU_MIRROR_VERT = OpConstant %uint32_t 0x6C ; Mirrors vertically, concurrent

These SPIR-V definitions ensure concurrent GPU execution, with HyperLock providing thread safety.

5. Struct Definitions

The Channel Paradigm relies on structs to manage channels, resources, and GPU tasks. Below are key structs supporting the framework.

Struct Name Fields Role
BigUInt128 uint64_t high;
uint64_t low;
Supports large memory allocations
HyperLock int64_t hl_flags;
pthread_mutex_t hl_mutex;
pthread_cond_t hl_cond;
char *hl_name;
Synchronizes channel operations
MemoryAllocationRequest uint64_t ma_size;
void *ma_name;
uint8_t ma_ram_type;
uint8_t ma_data_type;
uint8_t ma_dimension_type;
uint8_t ma_flags;
char ma_pad[24];
Defines allocations for MemoryChannel
GraphicsContext uint32_t gc_flags;
uint32_t gc_extra;
SDL_GPUDevice *gc_gpuDevice;
SDL_GPUCommandBuffer *gc_gpuCommandBuffer;
SDL_Rect gc_source_rect;
SDL_Rect gc_target_rect;
struct Screen *gc_screen;
SDL_Window *gc_window;
SDL_Surface *gc_window_surface;
SDL_Renderer *gc_renderer;
SDL_Texture *gc_texture;
SDL_Mutex *gc_mutex;
struct NetXecThread *gc_task;
struct Palette *gc_palette;
struct ColorOperation *gc_color_change;
void **gc_pixels;
SDL_Texture *gc_back_brush;
struct URL *gc_url;
uint32_t gc_fgPen;
uint32_t gc_bgPen;
Manages GPU rendering resources
MemoryChannel struct Channel base;
uint64_t *mc_stack_head;
uint64_t *mc_stack_base;
uint64_t *mc_stack_ptr;
uint64_t *mc_heap_top;
uint64_t *mc_heap_bottom;
struct MemoryHandle mc_memory_list[MAX_HANDLES];
uint64_t mc_size[MEMORY_TYPE_NUMBER];
uint64_t mc_allocated[MEMORY_TYPE_NUMBER];
uint64_t mc_remaining[MEMORY_TYPE_NUMBER];
struct BigUInt128 mc_total_memory;